Open Source Integrated Circuit Design with Fabricated and packaged Silicon TinyChips plus Test/Characterization
Electrical Engineering
Team 24: Avijit Jutla, Daniel Abreu, Justin Xu, Yinxuan Qiao, Ziyuan Zheng
Summary
Modern chip design is expensive and not very accessible to the general public. The goal of our capstone team is help make chip design more accessible by using and validating a cheap and/or open source workflow for chip design. Our work continues off the progress made by a previous capstone team by testing chips created through a workflow from a capstone previous team, and by using the same workflow to develop novel (low power) circuits.